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2010 Asia Academic Forum
Home ›Intel® Education Initiative › 2010 Asia Academic Forum › Track 1: System & Architecture ›
Track 1: System & Architecture
     
Track Speakers:    
   
 
Hang Nguyen
 
 
Senior Principle Engineer

Hang Nguyen Hang Nguyen holds a BSEE degree from the University of Tennessee in Knoxville (1982) and an MSEE degree from the Georgia Institute of Technology (1984). She worked at General Electric Semiconductor from 1984-1987 before joining Intel in 1987. She has worked in multiple areas of Integrated Circuit design, including I/O, logic and memory. She has also contributed to multiple CPU architectures and micro-architectures spanning from XScaleTM to Intel Architecture to Itanium Processor Family. She was the lead architect for Intel’s first embedded Xeon-class processor with PCI Express integration. Hang became an Intel Senior Principle Engineer in 2010 and is currently the lead CPU architect for Intel’s Embedded Communications Group. Her areas of interest include reliability research and development, on-die interconnects, and low power technologies. Hang holds more than 20 patents and many more pending.

In her spare time, Hang and her family love to travel and meeting new people. She also dotes on her two sons, Nathaniel, a senior at Washington University in St. Louis and Jonathan, an eighth grader. She also has two adoring dogs: wizard and foxy.

Presentation Title Unleashing the Potential of the Embedded

Abstract:
Over the past three decades, Intel has made significant strides in the embedded arena, from communications to industrial to medial segments, to name a few. With the internet explosion with unmet expectations of ubiquitous connectivity and computation, opportunities for the “internet of things” or “machine-to-machine” intelligent interaction seem unbounded. Machine can sense and interpret other machines leading to eventual action to enable and enhance not only the human race but potentially the earth. The end game is to raise the “wisdom, happiness, and longevity” of the world”.

This talk will start with discussing the advancement achieved in communications thus far then introduce the “machine-to-machine” concept, the requirements to make it successful and opportunities of this new paradigm.

 
Vasantha Erraguntla
 
 
Sr. Engineering Manager

Vasantha Erraguntla Vasantha Erraguntla joined Intel in 1991 to be a part of the Teraflop machine design team and worked on its high-speed router technology. In 1995, she joined Intel’s Design Technology team that was responsible for validating performance verification tools for high-speed designs. Since 1997, Vasantha has been engaged in a variety of advanced prototype design activities at Intel Laboratories, implementing and validating research ideas in high performance, low power circuits and high speed signaling. Since June 2004, Vasantha has been heading Intel Lab’s Bangalore Design Lab to facilitate world-class circuit research and silicon prototype development. She led the Bangalore team that co-delivered the design of the world’s first programmable Terascale processor and the 48–iA core Single-Chip Cloud Computer. She received 2 Intel Achievement Awards for these designs.

Vasantha has co-authored over 13 IEEE journal and conference papers and holds 3 patents and 2 pending. She served on the organizing committee of the 2008 and 2009 International Symposium on Low Power Electronics and Design (ISLPED) and on the Technical Program Committee of ISLPED 2007, Asia Solid State Circuits Conference (A-SSCC) in 2008 and 2009. She is also a Technical Program Committee member for energy-efficient digital design for ISSCC 2010 and ISSCC 2011. She is also serving on the Organizing Committee for the VLSI Design Conference 2011.

Presentation Title Intel® MIC Architecture – Learnings from Intel Labs Terascale Program (tentative title)

Abstract:
This talk will cover some of the key learnings from the 80-core Terascale Research processor and its follow-on, the 48-iA core Single Chip Cloud Computer from Intel Labs. These were among the programs which laid the foundation for the launch of a new architecture: the Intel® Many Integrated Core (MIC) architecture targeted for High Performance Computing applications.

 
Wen Wei, PhD
 
 
R&D Director

Wen Wei, PhD Dr. Wen Wei joined Intel in 1999 and has worked at Desktop Platform Group, Intel Communication Group, Mobile Platform Group and PC Client Group at Intel on desktop, server, notebook, netbook and tablet PC. Wen was relocated from Oregon USA to Shanghai in 2004 leading an innovation team to explore user experience based new mobile gadgets. Dr. Wei worked for Credence Systems Corp as a hardware design engineer before he worked for Intel.

Dr. Wei got his material science PhD degree in Oregon Science and Health University (former OGI) in 1997 and his engineering bachelor degree in Xi’an Jiaotong University on engine design. From 1990-1992 Mr. Wei studied at the Institute of Engineering Thermo-physics in Chinese Academy of Science in Beijing.

Dr. Wei posses 9 patents in USA. He has a daughter and a son. His hobbies are cooking, traveling, history, movie and sports.

Presentation Title Innovation from outside

Abstract:
About 500 to 700 million years ago, new species appeared in an explosion way, it is called the Cambrian Period. Today we are at the Cambrian period of new information and communication era. The presentation will share the insight, experience and the ways to innovate from system level outside silicons to explore and new mobile gadgets and evangelize them with industry ecosystem in the new era with m2m, cloud and personal communication devices. The presentation will also introduce some examples with Intel’s leading technologies to sponsor the tomorrow together with end users.