Intel® 5000V ChipsetTechnical Documents

Intel® 5000 Series Chipset supports PCIe* devices attached to the MCH and/or the Intel® 631xESB / 632xESB I/O Controller Hub (including integrated PCIe devices). Interrupt support for these PCIe devices is using PCI compatible INTx emulation scheme or using MSI/MSI-X scheme.

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The Intel® 5000P chipset is designed for systems based on the Dual-Core Intel® Xeon® 5000 sequence and supports a FSB frequency up to 1333 MTS.

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The Intel® 5000X chipset is designed for systems based on the Dual-Core Intel® Xeon® 5000 sequence and supports a FSB frequency up to 1333 MTS.

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This document is a core specification for a Fully Buffered DIMM (FB DIMM, also FBD) memory system. This document, along with the other core specifications, must be treated as a whole. Information critical to an Intel® 6400/6402 Advanced Memory Buffer (AMB) design appears in the other specifications, with specific cross-references provided.

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This specification is intended for Original Equipment Manufacturers designing and building Intel® 631xESB/632xESB I/O Controller Hub-based products. This manual assumes a working knowledge of the vocabulary and principles of PCI Express*, USB, IDE, AHCI, SATA, SMBus, PCI, PCI-X, ACPI, ESI, JTAG, and LPC. Although some details of these features are described within this specification, refer to the individual industry specifications listed in Table 1-1 for complete details.

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This document addresses thermal design and specifications for the Intel® 6400/6402 Advanced Memory Buffer specific to that of the Intel® 5000 Chipset Series-based platforms. For thermal design information on other chipset components, refer to the respective component datasheet.

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This document addresses thermal design and specifications for the Intel® 5000 Series chipset MCH components only. For thermal design information on other chipset components, refer to the respective component datasheet. For the PXH, refer to the Intel® 6700PXH 64-bit PCI Hub Thermal/Mechanical Design Guidelines. For the Intel® 631xESB/632xESB I/O Controller Hub, refer to the Intel® 631xESB/632xESB I/O Controller Hub Thermal/Mechanical Design Guidelines.

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This document addresses thermal design and specifications for the Intel® 631xESB/632xESB I/O Controller Hub component only. For thermal design information on other chipset components, refer to the respective component datasheet.

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This document is a compilation of errata, specification clarifications and changes. It is intended for hardware system manufacturers and software developers of applications, operating systems and tools.

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Intel® 6400/6402 Advanced Memory Buffer - This document is a compilation of errata, specification clarifications and changes. It is intended for hardware system manufacturers and software developers of applications, operating systems and tools.

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This is an update to the specifications in the documents listed in the "Affected Documents" and "Nomenclature" tables. It is a compilation of device and document errata and specification clarifications/changes, and is intended for hardware system manufacturers and software developers.

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