Intel® 845MP/845MZ ChipsetTechnical Documents

The Intel 845MP/845MZ Chipset Memory Controller Hub-M (MCH-M) is designed for use with the Mobile Intel Pentium 4 Processor-M. The Intel 845MP/845MZ Chipset MCH-M manages the flow of information between its four interfaces: the System Bus, the memory interface, the AGP port, and the hub interface.

File Type/Size:  PDF 1408KB

This document, the Intel® 82801CA I/O Controller Hub 3 (ICH3-S) Datasheet, describes the basic features, modes and registers supported by the ICH3-S, as well as signal descriptions and electrical and mechanical specifications.

File Type/Size:  PDF 2193KB

• Intel(R) 82801CA I/O Controller Hub 3 (ICH3-S) Specification Update

The Intel® 82845 Memory Controller Hub (MCH) is designed for use with the Intel® Pentium® 4 processor in the 478-pin package. The Intel® 845 chipset contains two main components: the Intel 82845 Memory Controller Hub (MCH) for the host bridge and the Intel 82801BA I/O Controller Hub (ICH2) for the I/O subsystem.

File Type/Size:  PDF 814KB

The Intel® 82845 MCH is designed for use with the Intel Pentium 4 processor in the 478-pin package. The Intel® 845 chipset contains two main components: the Intel 82845 MCH for the host bridge and the Intel 82801BA ICH2 for the I/O subsystem. The MCH provides the processor interface, system memory interface, AGP interface, and hub interface in an Intel 845 chipset desktop platform. This document describes the Intel 82845 MCH. Section 1.3 provides an overview of the Intel 845 chipset.

File Type/Size:  PDF 1118KB

• Intel 845 Chipset: Memory Controller Hub (MCH) For DDR Datasheet

This Design Guide Update document is an update to the specifications and information contained in the Mobile Intel® Pentium® 4 Processor-M and Intel® 845MP/MZ Chipset Platform Design Guide. This document is a compilation of updates to the general design considerations; schematic, layout, and routing updates; and documentation changes. This document is intended for hardware system manufacturers and for software developers of applications, operating systems, and tools.

File Type/Size:  PDF 41KB

The objective of thermal management is to ensure that the temperature of all components in a system is maintained within functional limits. The functional temperature limit is the range within which the electrical circuits can be expected to meet specified performance requirements. The goal of this document is to provide an understanding of the operating limits of the Intel® 845 chipset for use with Double Data Rate (DDR) memory and discuss a generic thermal solution.

File Type/Size:  PDF 344KB

The objective of thermal management is to ensure that the temperature of all components in a system is maintained within functional limits. The functional temperature limit is the range within which the electrical circuits can be expected to meet specified performance requirements. The goal of this document is to provide an understanding of the operating limits of the Intel® 845 chipset and discuss a generic thermal solution.

File Type/Size:  PDF 310KB

This design guide provides Intel®'s design recommendations for systems based on the Mobile Intel® Pentium® 4 Processor - M and the Intel® 845MP/MZ chipset. Design issues such as thermal considerations should be addressed using specific design guides or application notes for the processor or 845MP/MZ chipset.

File Type/Size:  PDF 3121KB

This document describes the required changes to platforms utilizing the Intel(R) Pentium(R) 4 processor with 512-KB L2 cache on 0.13 micron process to support a migration to the Intel(R) Celeron(R) D processor in the 478-pin package. The information in this document should be used in conjunction with specifications presented in the latest version of the Intel(R) Celeron(R) D Processors 335, 330, 325, and 320 Datasheet.

File Type/Size:  PDF 659KB

This design guide documents Intel's design recommendations for systems based on the Pentium 4 processor and the Intel® 845 chipset. Design issues such as thermal considerations should be addressed using specific design guides or application notes for the processor or 845 chipset. These design guidelines have been developed to ensure maximum flexibility for board designers while reducing the risk of board related issues.

File Type/Size:  PDF 12453KB

• Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845 Chipset Platform for DDR Design Guide Update
• Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845/845E/845G/845GL/845GV/845GE/845PE Chipset Platform Design Guide Addendum for Support with Intel® Celeron® D Processor in 478-pin Package

This Design Guide Update document is an update to the specifications and information contained in the Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845 Chipset Platform for DDR Design Guide, February 2002. The design guide (and this design guide update) is primarily targeted at the PC market segment and was first published in 2002. Those using this design guide and update should check for device availability before designing in any of the components included in this document.

File Type/Size:  PDF 981KB

• Intel 845 Chipset: Memory Controller Hub (MCH) For DDR Datasheet
• Intel® 82801BA I/O Controller Hub 2 (ICH2) and Intel® 82801BAM I/O Controller Hub 2 Mobile (ICH2-M) Datasheet
• Intel(R) Pentium(R) 4 Processor in 478-pin Package and Intel(R) 845/845E/845G/845GL/845GV/845GE/845PE Chipset Platform Design Guide Addendum For Support with Intel(R) Celeron(R) D Processor in 478-pin Package

This design guide documents Intel’s design recommendations for systems based on the Intel® Pentium® 4 processor and the Intel® 845 chipset. Design issues such as thermal considerations should be addressed using specific design guides or application notes for the processor or 845 chipset.

File Type/Size:  PDF 12181KB

• Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845 Chipset Platform for SDR Design Guide Update
• Intel(R) Pentium(R) 4 Processor in 478-pin Package and Intel(R) 845/845E/845G/845GL/845GV/845GE/845PE Chipset Platform Design Guide Addendum For Support with Intel(R) Celeron(R) D Processor in 478-pin Package

This Design Guide Update document is an update to the specifications and information contained in the Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845 Chipset Platform for SDR Design Guide, January 2002. The design guide (and this design guide update) is primarily targeted at the PC market segment and was first published in 2002. Those using this design guide and update should check for device availability before designing in any of the components included in this document.

File Type/Size:  PDF 1125KB

• Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845 Chipset Platform for SDR Platform Design Guide
• Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR Datasheet
• Intel® 82801BA I/O Controller Hub 2 (ICH2) and Intel® 82801BAM I/O Controller Hub 2 Mobile (ICH2-M) Datasheet

This document is an update to the specifications contained in the documents listed in the following Affected Documents/Related Documents table. It is a compilation of device and document errata and specification clarifications and changes, and is intended for hardware system manufacturers and for software developers of applications, operating system, and tools.

File Type/Size:  PDF 63KB